FIG. 1 shows a simplified "buck" type voltage regulator. Such regulators provide very high performance in terms of constant output voltage, low output ripple voltage, and controlled transient behavior. These performance advantages are somewhat offset by the facts that they can be heavy and bulky. These regulators are used to convert a high DC voltage into a lower DC voltage.
The regulator alternates between the two conditions shown in FIG. 1A and FIG. 1B. In FIG. 1A, the switch S is closed, and a charging current I.sub.CHARGE flows through the inductor L. In FIG. 1B, the switch S is open, and a discharging current I.sub.DISCH flows through diode D. If it is assumed that capacitor C is large, so that V.sub.C remains constant, and that the switch S and diode D are ideal elements, then FIG. 2 illustrates the approximate behavior of the apparatus of FIGS. 1A and 1B.
FIG. 2A illustrates the time-behavior of switch S. A duty cycle D is defined as the ratio of t.sub.1 /T, as indicated. FIG. 2B illustrates the current I.sub.L through the inductor L. The current remains positive at all times, and swings from I.sub.L1 to I.sub.L2, and back. FIG. 2C illustrates the voltage V.sub.L across the inductor. It swings from a positive value of (V.sub.1 -V.sub.C) to a negative value of (-V.sub.C).
FIG. 2D illustrates the voltage across diode D. When the switch S is closed, V.sub.1 appears across the diode D. When the switch S is open, a zero voltage appears across the diode, because the diode is assumed to be ideal.
FIG. 2E illustrates the voltage across the switch S. In a sense, this voltage is opposite to that across the diode D. When the switch S is open, V.sub.1 appears across the switch S. When the switch S is closed, a zero voltage appears across the switch S.
FIG. 2F illustrates the current I.sub.C flowing into the capacitor. When the switch S is closed, the capacitor C charges. When the switch S opens, inductor L is placed in parallel with the capacitor C, but with a negative voltage, thereby causing the current charging the capacitor C to diminish, in region R1 in FIG. 2F, and then to become negative, in region R2, which represents a discharge of capacitor C. Then, when the switch S closes again, in region R3, the capacitor C charges again. The hatched regions represent equal charges, because current multiplied by time equals charge.
The plots of FIG. 2 are justified by the following equations. The variables are defined in FIGS. 1A, 1B and 2.